Using CPLD to Decoding Large Number of Device’s Enables

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This article is adapted from David’s telephony project on how to expand blackfin STAMP SPORT select lines so that we can access multiple SPI devices across multiple cards using only a small number of SPI lines available on the SPORT connector. However, the CPLD design basically has been changed from its David’s origin version as it’s purposed for 8fx. This 8fx is SPORT daughter board to support upto 8 telephony ports, SD card, and 8 LED line-drivers.
You can use this article as an example implementation of cpld on which may targeted to other boards.

Introduction

On the 8fx card a Xilinx CPLD is used to (i) expand the number SPI select lines available and (ii) provide a register to drive the LEDs. The blackfin STAMP SPORT connectors have only a limited number of SPI select lines available. However on the 8fx design we have many SPI devices:

  • 8 telephony ports (FXS or FXO)
  • SD card
  • 8 dual-coler LEDs

So the problem is how to access multiple SPI devices across multiple cards using only a small number of SPI lines available on the SPORT connector.

Design

We decode a large number of SPI devices using just two SPI select lines, called nCSB and nCSA. It works like this:

  • nCSB is asserted and a byte is sent that selects the SPI device we wish to address:
    format is D7 D6 D5 D4 D3 D2 D1 D0
    A7 A6  X  X A3 A2 A1 A0

    A[7:6] select this card from other cards in a stack. Two jumpers determine the address of this card. Each card in the stack must have a unique 2 bit address to be successfully decoded.

    A[3:0] select the SPI device on this card (only 11 devices decoded at present).

      A3 A2 A1 A0 | SPI Device
    ------------|-----------
    0  0  0  0 | nCS0: SD card
    0  0  0  1 | nCS1: Port 1
    0  0  1  0 | nCS2: Port 2
    0  0  1  1 | nCS3: Port 3
    0  1  0  0 | nCS4: Port 4
    0  1  0  1 | nCS5: Port 5
    0  1  1  0 | nCS6: Port 6
    0  1  1  1 | nCS7: Port 7
    1  0  0  0 | nCS8: Port 8
    1  0  0  1 | nCS9: LED register A (LDA)
    1  0  1  0 | nCS10: LED register B (LDB)

    nCS[8:0] are routed via IO pins to devices external to the CPLD. nCS[10:9] are an internal SPI device and is not routed to an IO pin.

  • nCSA is then asserted to talk to the actual SPI device. The nCSA line is routed by a demultiplexor to the desired SPI device. nCSA is asserted as many times as required for example to perform a block transfer on the SPI device.
  • Note that once the device has been selected SPI transfers are just like normal, assert nCSA and read/write as desired.
  • When access to another SPI device is required, nCSB is asserted and the byte sent can be used to select another device (or card).
  • The LEDs appear as 2 8-bit SPI registers at address 9 and 10 on the card. When we write to these registers the value determines the status of each LEDs. Value on LDA[0] and LDB[0] determines the status of LED1 as follows:
      LDA[0] LDB[0] | LED1
    --------------|---
    0        0    | off
    0        1    | red
    1        0    | green
    1        1    | off

    An similarly for the other LEDs:

      LDA[1] LDB[1] : LED2
    LDA[2] LDB[2] : LED3
    LDA[3] LDB[3] : LED4
    LDA[4] LDB[4] : LED5
    LDA[5] LDB[5] : LED6
    LDA[6] LDB[6] : LED7
    LDA[7] LDB[7] : LED8

    For example we want to turn LED2 and LED4 on green (G), while LED3 and LED7 red (R), then we need to write b00001010 to SPI device 9 and b01000100 to SPI device 10.

  • In the current design the LEDs will “flicker” as the new value is shifted in. However this should happen so fast it won’t be obvious to a user. If this is a problem we could latch the LED register output on the rising edge of nCS9 and nCS10

Tools

  • Icarus Verilog is used for simulation
  • Xilinx Web pack is used for synthesis.

How To

  1. Simulate:
       $ make 8fx
    $ vvp xilinx_8fx_tb
  2. Synthesis:
       $ make SYNTH=/path/to/synth/tool/src copy

    In the Xilinx Project Navigator “Processes” window, click on “Create Programming File” and right on “Run”.

    Note: My Xilinx Web pack software can’t “see” the hardware-x.y directory due to my network configuration which is why I need this “make copy” step.

  3. Pin Lock:
    • Modify the file xilinx_8x.ucf
    • Goto (2) above

Sample Simulation

  1. Set 8 LEDs status

    In this example the Address jumpers A[7:6] are set to (binary) 00. First we send the byte b00001001 using nCSB. This selects SPI device 9 on card with the address b00. Next we send b00010010 using nCSA to SPI device 9 (the green LED register, can be threat as fxo card). This will make LED2 and LED5 green. we can then turn on red LED (you can threat as fxs card), by sending the byte b00001010 using nCSB to select SPI device 10. Next we send b01000010 using nCSA to SPI device 10. This will make LED1 and LED7 red.

    SCLK	nCSA	nCSB	SDI	nCS8_0		LEDA		LEDB
    1	0	1	1	011111111	00000000	00000000
    1	1	1	1	111111111	00000000	00000000
    0	1	1	1	111111111	00000000	00000000
    1	1	1	1	111111111	00000000	00000000
    1	1	0	1	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	1	111111111	00000000	00000000
    1	1	0	1	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	1	111111111	00000000	00000000
    1	1	0	1	111111111	00000000	00000000
    1	1	1	1	111111111	00000000	00000000
    0	1	1	1	111111111	00000000	00000000
    1	1	1	1	111111111	00000000	00000000
    1	0	1	1	111111111	00000000	00000000
    0	0	1	0	111111111	00000000	00000000
    1	0	1	0	111111111	00000000	00000000
    0	0	1	0	111111111	00000000	00000000
    1	0	1	0	111111111	00000000	00000000
    0	0	1	0	111111111	00000000	00000000
    1	0	1	0	111111111	00000000	00000000
    0	0	1	1	111111111	00000000	00000000
    1	0	1	1	111111111	00000001	00000000
    0	0	1	0	111111111	00000001	00000000
    1	0	1	0	111111111	00000010	00000000
    0	0	1	0	111111111	00000010	00000000
    1	0	1	0	111111111	00000100	00000000
    0	0	1	1	111111111	00000100	00000000
    1	0	1	1	111111111	00001001	00000000
    0	0	1	0	111111111	00001001	00000000
    1	0	1	0	111111111	00010010	00000000
    1	1	1	0	111111111	00010010	00000000
    0	1	1	0	111111111	00010010	00000000
    1	1	1	0	111111111	00010010	00000000
    LEDA TEST PASSES!
    1	1	0	0	111111111	00010010	00000000
    0	1	0	0	111111111	00010010	00000000
    1	1	0	0	111111111	00010010	00000000
    0	1	0	0	111111111	00010010	00000000
    1	1	0	0	111111111	00010010	00000000
    0	1	0	0	111111111	00010010	00000000
    1	1	0	0	111111111	00010010	00000000
    0	1	0	0	111111111	00010010	00000000
    1	1	0	0	111111111	00010010	00000000
    0	1	0	1	111111111	00010010	00000000
    1	1	0	1	111111111	00010010	00000000
    0	1	0	0	111111111	00010010	00000000
    1	1	0	0	111111111	00010010	00000000
    0	1	0	1	111111111	00010010	00000000
    1	1	0	1	111111111	00010010	00000000
    0	1	0	0	111111111	00010010	00000000
    1	1	0	0	111111111	00010010	00000000
    1	1	1	0	111111111	00010010	00000000
    0	1	1	0	111111111	00010010	00000000
    1	1	1	0	111111111	00010010	00000000
    1	0	1	0	111111111	00010010	00000000
    0	0	1	0	111111111	00010010	00000000
    1	0	1	0	111111111	00010010	00000000
    0	0	1	1	111111111	00010010	00000000
    1	0	1	1	111111111	00010010	00000001
    0	0	1	0	111111111	00010010	00000001
    1	0	1	0	111111111	00010010	00000010
    0	0	1	0	111111111	00010010	00000010
    1	0	1	0	111111111	00010010	00000100
    0	0	1	0	111111111	00010010	00000100
    1	0	1	0	111111111	00010010	00001000
    0	0	1	0	111111111	00010010	00001000
    1	0	1	0	111111111	00010010	00010000
    0	0	1	0	111111111	00010010	00010000
    1	0	1	0	111111111	00010010	00100000
    0	0	1	1	111111111	00010010	00100000
    1	0	1	1	111111111	00010010	01000001
    1	1	1	1	111111111	00010010	01000001
    0	1	1	1	111111111	00010010	01000001
    1	1	1	1	111111111	00010010	01000001
    LEDB TEST PASSES!
  2. SPI Device External to CPLD

    Similar to example 1 except SPI device 4 is selected, which causes nCS4 to be asserted when nCSA is asserted.

    SCLK nCSA nCSB SDI nCS8_0	LEDA		LEDB
    1	0	1	1	111110111	00000000	00000000
    1	1	1	1	111111111	00000000	00000000
    0	1	1	1	111111111	00000000	00000000
    1	1	1	1	111111111	00000000	00000000
    1	1	0	1	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	1	111111111	00000000	00000000
    1	1	0	1	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    0	1	0	0	111111111	00000000	00000000
    1	1	0	0	111111111	00000000	00000000
    1	1	1	0	111111111	00000000	00000000
    0	1	1	0	111111111	00000000	00000000
    1	1	1	0	111111111	00000000	00000000
    1	0	1	0	111101111	00000000	00000000
    0	0	1	0	111101111	00000000	00000000
    1	0	1	0	111101111	00000000	00000000
    0	0	1	1	111101111	00000000	00000000
    1	0	1	1	111101111	00000000	00000000
    0	0	1	0	111101111	00000000	00000000
    1	0	1	0	111101111	00000000	00000000
    0	0	1	1	111101111	00000000	00000000
    1	0	1	1	111101111	00000000	00000000
    0	0	1	0	111101111	00000000	00000000
    1	0	1	0	111101111	00000000	00000000
    0	0	1	1	111101111	00000000	00000000
    1	0	1	1	111101111	00000000	00000000
    0	0	1	0	111101111	00000000	00000000
    1	0	1	0	111101111	00000000	00000000
    0	0	1	1	111101111	00000000	00000000

Revision History

  • Eko Didik, 11/07/2006 Decoding 8-lines and 8-LEDs
  • David Rowe,08/18/2006 Original version

One Comment to “Using CPLD to Decoding Large Number of Device’s Enables”

  1. Interesting prospective. Thanks for a nice article

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